Yesterday, Santa Clara-based semiconductor solutions vendor MoSys announced the MSH210 LineSpeed 100G Quad Retimer integrated circuit, positioning the product as a space- and power-saving product ready to support next-generation networking and communications demands.
MoSys claims industry-leading performance for line cards, backplanes, copper cables, and optics modules that require high-density 100G capacity, thanks to the vendor's high-speed, silicon-proven CMOS PHY technology. The 100G Quad Retimer will support simultaneous full-duplex 100G operation at four lanes of 25 Gigabits per second (Gbps) data transmission thanks to an eight-lane eye opener, equalizer, clock and data recovery (CDR) and retransmitter. The device can input and output simultaneously on all channels, with each lane providing data rates up to 28 Gbps.
The 100G Quad Retimer will support interconnect base PHY data rate transitions from 10 Gbps to 25 Gbps, necessary to enable the hundreds of Gigabits of throughput of aggregate bandwidth that next-generation network will require, while "meeting space and power budgets," according to MoSys VP of marketing John Monson. Monson elaborated that the device will do so "by providing an integrated CMOS device with extended reach capabilities to ensure robust data transmission of 25 Gbps signals and 100G protocols in datapath applications."
When asked about the product's competitiveness in the market, Monson told Enterprise Networking Planet that "MoSys's LineSpeed 100G Quad Retimer is built using standard CMOS technology. The full-duplex capability of the MSH210 device has higher density than unidirectional solutions and enables a wide range of extended reach capabilities versus very short reach CDR/retime products." MoSys does not disclose product pricing, however, directing interested parties to contact the company's sales representatives directly.
Jude Chao is Executive Editor of Enterprise Networking Planet. Follow her on Twitter @judechao.