Aliathon, Vitesse Collaborate on Optical Transport Network Tools

by Enterprise Networking Planet Staff

Aliathon will license Vitesse's 40G and 100G eFEC cores for FPGA implementation in OTN applications.

Vitesse Semiconductor Corporation (NASDAQ: VTSS) and Aliathon Ltd., have announced that Aliathon will license Vitesse’s patented portfolio of 40G and 100G hard decision enhanced Forward Error Correction (eFEC) cores for its FPGA and ASSP solutions aimed at emerging Optical Transport Network (OTN) applications.


"Widely applied in fiber optic communications, eFEC reduces bit error rate in typically noisy signal environments. Developing cost-effective, improved signal-to-noise ratio solutions becomes a significant challenge as metro and long-haul networks transition up to 100G data rates and beyond. Vitesse solves this issue with its patented Continuously Interleaved BCH (CI-BCH™) eFEC code which offers the highest performing hard decision eFEC available today and is the industry’s only eFEC implementable in FPGA form at 100G."

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This article was originally published on Tuesday Sep 20th 2011